1. Technical Field
The present invention relates to schematic design, and in particular, to methods for generating schematic diagrams and apparatuses using the same.
2. Description of the Related Art
It consumes excessive time for an engineer to draw schematic diagrams in schematic design, for example by drawing a line and assigning a net name for each pin. A total number of nets in an information product typically are in the thousands, and each net may include five or more pins. In addition, the connectivity of the net pins usually crosses tens of pages, causing the engineer to spend much time with the trivial tasks of assigning net symbols, net names and cross page symbols. However, the routine manual operations can easily go wrong, and it may cause the production machine to malfunction when the schematic diagram has errors. Thus, it is desirable to have methods for generating schematic diagrams and apparatuses using the same to not only reduce the drawing time but also eliminate errors that happen in schematic diagrams.